Skip to content

sscs-ose/sscs-ose-code-a-chip.github.io

Repository files navigation

IEEE SSCS Open-Source Ecosystem “Code-a-Chip” Travel Grant Awards at ISSCC'26

The IEEE SSCS Code-a-Chip Travel Grant Award was created to:

  1. Promote reproducible chip design using open-source tools and notebook-driven design flows,
  2. Enable up-and-coming talents as well as seasoned open-source enthusiasts to travel to IEEE SSCS conferences and interact with the leading-edge chip design community, and
  3. Broaden educational value and accessibility within the open-source chip design community, fostering a more inclusive environment for dissemination, learning, and innovation.

Program Rules

  • The program is open to anyone (no restrictions). We run continuously the Code-a-Chip (CAC) competition for ISSCC and VLSI conferences with clear deadlines. IEEE Solid-State Circuits Society (SSCS) membership is encouraged but not required. Teaming is encouraged, but each team must identify a single leader who can travel to ISSCC from Feb. 15-19, 2026, to receive the award and participate in networking events.
  • Applicants must submit an open-source Jupyter notebook detailing an innovative circuit design using open-source tools. The objective is to disseminate the main ideas and design choices using open-source tools and PDKs in a reproducible manner. Generating a final layout of your circuit is encouraged but not required.
    • Examples: inverter, temperature sensor
    • Submissions of previous winners: VLSI'25, ISSCC'24, ISSCC'23, VLSI'24 and VLSI'23
    • ❗️Starting from the VLSI 2025 grant, the submission categories and criteria for selecting finalists will be expanded to include creative educational purposes of chip design. This can include:
      • innovative uses of Python packages for circuit visualization or generating animations to explain digital (e.g., D flip-flop) and analog (e.g., SAR ADCs) circuits,
      • exploring open-source PDKs to explain Figure-of-Merit (FoM) of building blocks with SPICE simulation results that demonstrate the value of FoM (trend, foresight, etc).
  • Each submission must contain a suitable open-source license (e.g., Apache 2.0).
  • Travel arrangements must comply with the IEEE Travel and Expense Reimbursement Guidelines and awardees must attend the conference in person to qualify for reimbursement.

Evaluation

  • A jury will evaluate the submissions and select up to 10 winners.

Grant Amount

  • Travel grants of up to US$500 (for secondary students), up to US$2,500 (for undergraduate students), and between US$1,000-US$5,000 (for graduate students and all others) will be awarded. This award can be used to reimburse travel and a portion of your accommodations until the dollar amount is used up.

Program Logistics

  • The notebooks must be submitted through a GitHub Pull Request at the SSCS Open-Source Ecosystem Code-a-Chip (OSE) GitHub portal.
    • Fork the source repo https://github.com/sscs-ose/sscs-ose-code-a-chip.github.io to your local repo.
    • Create a new directory ISSCC26/submitted_notebooks/<my_project_name> in your local repo.
    • Add your Jupyter notebook to the directory.
    • Create a pull request from your local repo to the source repo.
  • Notebooks submissions must follow guidelines in the How to Apply section.
  • The winners are expected to attend the conference to be recognized for their awards and to present a poster.
  • Reimbursement will be provided after the conference when air and accommodation receipts are sent to the conference Treasurer.

Program Schedule

  • October 31, November 4, 2025, 11:59 AM Pacific Time: Notebook submission deadline (GitHub pull request)
  • TBD: Announcement of winners
  • February 15-19, 2026: Attend the conference

The International Solid-State Circuits Conference (ISSCC) 2026 Code-a-Chip Travel Grant Award is created to:

  1. Promote reproducible chip design using open-source tools and notebook-driven design flows and
  2. Enable up-and-coming talents as well as seasoned open-source enthusiasts to travel to the Conference and interact with the leading-edge chip design community.
  • On Google Colab, OpenLane may fail to generate layout. If you encounter this issue, you can generate layout on local environment and put the screenshot on jupyter notebook

Contact